US academics have revealed a revolutionary process of manufacturing computer chips which they claim has the potential to save billions of dollars a year.

Melvin Breuer, a professor at the University of Southern California Viterbi School of Engineering, believes that traditional manufacturing methods, which discard any chips with even the smallest of imperfections, is wasting processors that are often "good enough" to be incorporated into devices.

"Chips with any flaws at all have always been discarded," he said. "And this significantly increases the cost for the good ones."

When manufacturers start making a complex chip, a very large percentage are faulty, Breuer explained. This percentage decreases as manufacturing techniques improve, but "by the time the technique is thoroughly mastered, the chip is on its way to being obsolete".

Some chip designers try to cut the losses by designing redundancy into the circuits, so that when circuitry fails other circuitry can take its place. Even with these costly measures, large numbers of chips wind up as extremely expensive industrial waste.

This wastage, often half the output or more, has traditionally been written off as a business cost. But seven years ago, Breuer and Viterbi School colleague S K Gupta began investigating the idea of acceptable errors produced by defective chips.

For some applications, such as security, accounting and science, errors are intolerable, according to Breuer. But for many others, including graphics, there is a surprising amount of leeway for "error tolerance" in silicon.

"If you have an application where the end user is a person, rather than another computer, small changes in the output are imperceptible," said Breuer, giving as an example images created by a chip with a few defects in which only one or two pixels were out of place.

The critical factor, according to Breuer, is being able cost-efficiently to test and predict whether a defective chip will provide acceptable performance without having to plug it into the application.

Breuer and Gupta have developed simple built-in test structures for chips that can automatically determine attributes regarding erroneous performance, such as error rate and significance.

A recent analysis indicated that 60 per cent of chips with a single defect would be able to decode MPEG video files and play them back with no user-noticeable errors.

The chip industry is also starting to prick up its ears, according to Breuer. "When I first started talking to them, they were very negative," he said. "'We don't want our name associated in any way with a defective product,' was their response."

But this attitude seems to be changing. Breuer claimed that over the past 12 months he has been invited to give keynote talks at three conferences on the subject of error tolerance.

"If these ideas catch on, we will see a major shift in the way chips are designed, tested and marketed. And these ideas will allow industry to continue to scale technology according to Moore's Law, while reducing the cost of chips to the end user," he explained.

"Considering that the net revenues of chips sold in 2004 was over $210bn, the annual economic impact of these ideas could easily amount to billions of dollars."